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STMicroelectronics unveils next generation X86 SOC family
Oct. 10, 2000

At the Microprocessor Forum today, STMicroelectronics unveiled the next generation of its highly integrated "STPC" family of x86 PC-compatible System-on-Chip (SOC) devices. Known as the STPC Galaxy, the new family will achieve both higher integration and higher performance, along with lower power dissipation, relative to the latest products in the STPC SOC family. The Galaxy family is based on 0.18µ CMOS technology, uses a new "sixth generation" x86 core, and implements innovative design techniques to minimize power consumption.

The new STPC core (known as the CP250) is considered a Pentium-II class processor, and includes an FPU with "Triple Issue MMX Technology" which is targeted to the needs of audio and DSP applications such as soft modems, GSM protocol, soft DVD, and digital imaging. The Galaxy family SOCs will initially support clock speeds of up to 250MHz. Power saving technologies include an automatic clock stop on unused blocks, plus software-driven clock throttling to tailor performance to the application. Estimated "typical" power consumption ranges from 1.1W at 250MHz/1.8V, down to 0.2W at 66MHz/1.3V.

Being x86 and PC architecture compatible, the new Galaxy family processors will fully support the use of embedded Linux as the application operating system environment. "STPC's x86 PC-compatible architecture makes Linux a natural choice for an operating system. Combine the performance capabilities of our newest STPC family of chips together with Linux and you have a compelling combo for the embedded processor user," says Colin Long, Director of Product Marketing.

The first two members of the STPC Galaxy family are the STPC Vega and STPC Pictor. Here is a summary of features of these first two Galaxy family members:
    Both devices include:
  • CP250 core processor
  • 64-bit Unified Memory Architecture (UMA)
  • SDRAM controller
  • PCI Master/Slave controller
  • 16-bit local bus
  • ISA bus for legacy PC peripheral support
  • Integrated Peripheral Controller (IPC)
  • Power Management Unit
  • I2C bus controller
  • JTAG port

    In addition to the common functions, the STPC Vega adds:
  • ATA66-compliant UIDE interface
  • Ethernet 10/100 MAC
  • USB Host dual port hub
  • Serial port
  • 8 general purpose I/O

    In addition to the common functions, the STPC Pictor adds:
  • ATA33-compliant UIDE interface
  • 64-bit 2D accelerator
  • VGA controller
  • Internal RAMDAC
  • Video input port
  • TV output with programmable 3-tap flicker filter, PAL/NTSC TV encoder
First engineering samples of the new Galaxy Vega and Pictor SOCs is scheduled to begin during Q2 '01.



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